It is known that in a semiconductor device amplifying signals of a certain frequency harmonics are generated as distortion outputs due to a non-linear characteristic of the amplification, resulting in reduced output efficiency of the fundamental waves which are included in the original signal.
FIG. 9 is a partial top view of a semiconductor chip 90 used in a conventional semiconductor device. In the figure, reference numeral 1 designates a gate pad, numeral 2 designates a drain pad, numeral 3 designates a gate electrode, numeral 4 designates a source electrode, numeral 5 designates a drain electrode, numeral 6 designates gate wiring interconnecting the gate pad 1 and the gate electrodes 3, and numeral 7 designates a drain wiring interconnecting the drain pad 2 and the drain electrodes 5. The gate wiring 6 and the drain wiring 7 generally comprise a metal such as Au or Al. Reference numeral 8 designates a semiconductor substrate comprising GaAs, InP, or the like. Reference numeral 9 designates a semiconductor cell which is a part of the semiconductor chip 90.
FIG. 10 is a top view illustrating the structure of a conventional semiconductor device 100 including the semiconductor chip 90. FIG. 11 is an equivalent circuit diagram of the semiconductor device 100 shown in FIG. 10. In the figures, the same reference numerals as in FIG. 9 designate the same or corresponding parts. Reference numeral 10 designates an input-side external matching circuit, numeral 11 designates an output-side external matching circuit, numeral 12 designates a package, numeral 13 designates an input-side internal matching circuit, and numeral 14 designates an output-side internal matching circuit. The input-side internal matching circuit 13 and the output-side internal matching circuit 14 normally comprise substrates made of alumina or the like, respectively. Reference numeral 15 designates a wire, and numeral 16 designates a lead extended from the package 12. In the semiconductor chip 90, reference numeral 17 designates a via hole which electrically interconnects the source electrode 4 and a ground electrode on the back surface of the semiconductor chip 90 (not shown). The package 12 works as a ground electrode comprising a conductor, such as Cu or CuW, and is electrically connected to the ground electrode on the back surface of the semiconductor chip 90.
FIG. 12 is an equivalent circuit diagram of the semiconductor cell 9. In the figure, L.sub.G indicates a parasitic inductance of the gate wiring 6, C.sub.Gpd indicates a capacitance of the gate pad 1, L.sub.D indicates a parasitic inductance of the drain wiring 7, and C.sub.Dpd indicates a capacitance of the drain pad 2. The semiconductor cell 9 comprises a plurality of semiconductor components connected to one gate pad 1 and one drain pad 2 in the semiconductor chip 90, and it is regarded as an operation unit of the semiconductor chip 90.
FIG. 13 is a circuit diagram illustrating a first example 130 of the output-side external matching circuit 11. In the figure, reference numeral 18 designates a distributed constant circuit having a length P, and numeral 19 designates a resistor having a resistance R. Reference numeral 20 designates an inductor, and numeral 21 designates a capacitor. The output-side external matching circuit 130 includes two circuits, each comprising a combination of an inductor 20 and a capacitor 21 connected in parallel. The inductors 20 have inductances L.sub.1 and L.sub.3, respectively, and the capacitors 21 have capacitances C.sub.1 and C.sub.3, respectively.
FIG. 14 is a circuit diagram illustrating a second example 140 of the output-side external matching circuit 11. In the figure, the same reference numerals as in FIG. 13 designate the same or corresponding parts. The output-side external matching circuit 140 comprises a circuit having a combination of an inductor 20 and a capacitor 21 connected in series. The inductor 20 has an inductance L.sub.0, and the capacitor 21 has an inductance C.sub.0.
Hereinafter a description is given of the operation of the conventional semiconductor device having the above-described structure. Initially, in the case of the output-side external matching circuit 130, if the two circuits, each having a combination of an inductor 20 and a capacitor 21, are set so that the following relations are established in the respective circuits: ##EQU1## an impedance Z of the semiconductor chip 90 viewed from the side of the drain electrode 5 with respect to a frequency nf (n: positive integer) of a harmonic of a high-frequency wave 111 (fundamental wave) having a frequency f, is ##EQU2## At this time, in the output-side external matching circuit 11, a second harmonic having a frequency that is an even multiple of the frequency of the fundamental wave is short-circuited, and a third harmonic having a frequency that is an odd multiple of the frequency of the fundamental wave is open circuited. This means that a high efficiency operation, so-called Class-F amplification, is realized (see "Class-F Power Amplifiers with Maximally Flat Waveforms", IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, Vol. 45. No.11, November 1997).
As described above, when the output-side external matching circuit 130 shown in FIG. 13 is used as an external matching circuit, the operational efficiency of the semiconductor device can be improved by controlling harmonics with class-F amplification.
Next, in the case of the output-side external matching circuit 140, the following relation is established between the inductor 20 and the capacitor 21: ##EQU3## In this case, the fundamental wave can be amplified while a second harmonic as a distortion output is short-circuited at the output side, thereby improving the operational efficiency of the semiconductor chip.
In the operations of the output-side external matching circuits 130 and 140, the parasitic capacitance C.sub.Dpd and inductance L.sub.D exist in the semiconductor chip 90 as shown in the equivalent circuit diagram of FIG. 12. An input fundamental wave is affected by these parasitic capacitances and inductance and thus its harmonics are normally out of the phases of ideal short-circuiting and open circuiting.
Therefore, in the conventional semiconductor device, the phases of harmonics are corrected by adjusting the length P of the distributed constant circuit 18 in a simulation, so as to implement the ideal short-circuiting and open circuiting.
In the conventional semiconductor device described above, as the frequency of an input high-frequency wave becomes higher, the input/output impedance of the semiconductor chip 90 is reduced, thereby increasing the loss between the external matching circuit 10 and the semiconductor chip 90. For example, when f=20 GHz, a loss caused by a second harmonic having a frequency 2f=40 GHz amounts to several dB, thereby considerably degrading the efficiency of the semiconductor device.
To solve the above-described problems, in the conventional semiconductor device, the internal matching circuits 13 and 14 are provided near the semiconductor chip 90 to match to an input fundamental wave (frequency f), thereby preventing a reduction in the load impedance in the semiconductor chip 90.
Further, Japanese Published Patent Application No. Sho.63-279608 proposes a technology for improving operational efficiency, wherein circuits for matching with a second harmonic as well as with a fundamental wave are added to internal matching circuits of the class F amplifier.
However, in the prior art semiconductor devices, since the path lengths of the wires interconnecting the external and internal matching circuits with the respective semiconductor cells 9 within the semiconductor chip 90 are not uniform or the accuracy of the lengths of the wires themselves varies, the external matching circuits and the internal matching circuits cannot process the fundamental wave or harmonics in optimal phases for each semiconductor cell 9 which is a component of the semiconductor chip 90.
Therefore, the prior art semiconductor device cannot produce a harmonic impedance optimized for the semiconductor chip 90, and thus does not satisfactorily improve the amplification efficiency.